Revision d57019d1858a6f9b3ca05d76d793466ae428cfa3 authored by Sergei Shtylyov on 22 March 2016, 21:44:40 UTC, committed by David S. Miller on 23 March 2016, 17:38:40 UTC
The driver of course "knows" that the chip's reset signal is active low,
so it drives the GPIO to 0 to reset the PHY and to 1 otherwise; however
all this will only work iff the GPIO is specified as active-high in the
device tree! I think both the driver and the device trees (if there are
any -- I was unable to find them) need to be fixed in this case...
Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent 9a34921
| File | Mode | Size |
|---|---|---|
| Kconfig | -rw-r--r-- | 3.3 KB |
| Makefile | -rw-r--r-- | 1.1 KB |
| README | -rw-r--r-- | 7.9 KB |
| acl.h | -rw-r--r-- | 1.8 KB |
| bitmap.c | -rw-r--r-- | 39.3 KB |
| dir.c | -rw-r--r-- | 9.0 KB |
| do_balan.c | -rw-r--r-- | 54.3 KB |
| file.c | -rw-r--r-- | 7.6 KB |
| fix_node.c | -rw-r--r-- | 77.4 KB |
| hashes.c | -rw-r--r-- | 3.5 KB |
| ibalance.c | -rw-r--r-- | 34.3 KB |
| inode.c | -rw-r--r-- | 93.2 KB |
| ioctl.c | -rw-r--r-- | 5.3 KB |
| item_ops.c | -rw-r--r-- | 18.0 KB |
| journal.c | -rw-r--r-- | 120.3 KB |
| lbalance.c | -rw-r--r-- | 41.3 KB |
| lock.c | -rw-r--r-- | 2.6 KB |
| namei.c | -rw-r--r-- | 44.1 KB |
| objectid.c | -rw-r--r-- | 6.8 KB |
| prints.c | -rw-r--r-- | 20.6 KB |
| procfs.c | -rw-r--r-- | 13.3 KB |
| reiserfs.h | -rw-r--r-- | 116.6 KB |
| resize.c | -rw-r--r-- | 6.3 KB |
| stree.c | -rw-r--r-- | 64.0 KB |
| super.c | -rw-r--r-- | 67.9 KB |
| tail_conversion.c | -rw-r--r-- | 9.2 KB |
| xattr.c | -rw-r--r-- | 25.5 KB |
| xattr.h | -rw-r--r-- | 4.0 KB |
| xattr_acl.c | -rw-r--r-- | 9.6 KB |
| xattr_security.c | -rw-r--r-- | 2.7 KB |
| xattr_trusted.c | -rw-r--r-- | 1.2 KB |
| xattr_user.c | -rw-r--r-- | 1.1 KB |
Computing file changes ...
