Revision db7dedd0de714a59d8fa2a1be3b6b00543ad415a authored by Christoffer Dall on 19 November 2014, 11:23:54 UTC, committed by Paolo Bonzini on 26 November 2014, 13:40:43 UTC
When running on a system with a GICv3, we currenly don't allow the guest to access the system register interface of the GICv3. We do this by clearing the ICC_SRE_EL2.Enable, which causes all guest accesses to ICC_SRE_EL1 to trap to EL2 and causes all guest accesses to other ICC_ registers to cause an undefined exception in the guest. However, we currently don't handle the trap of guest accesses to ICC_SRE_EL1 and will spill out a warning. The trap just needs to handle the access as RAZ/WI, and a guest that tries to prod this register and set ICC_SRE_EL1.SRE=1, must read back the value (which Linux already does) to see if it succeeded, and will thus observe that ICC_SRE_EL1.SRE was not set. Add the simple trap handler in the sorted table of the system registers. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> [ardb: added cp15 handling] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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File | Mode | Size |
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Makefile | -rw-r--r-- | 394 bytes |
compat.c | -rw-r--r-- | 19.1 KB |
compat_mq.c | -rw-r--r-- | 3.9 KB |
ipc_sysctl.c | -rw-r--r-- | 7.0 KB |
ipcns_notifier.c | -rw-r--r-- | 2.2 KB |
mq_sysctl.c | -rw-r--r-- | 2.9 KB |
mqueue.c | -rw-r--r-- | 35.3 KB |
msg.c | -rw-r--r-- | 23.9 KB |
msgutil.c | -rw-r--r-- | 3.6 KB |
namespace.c | -rw-r--r-- | 4.7 KB |
sem.c | -rw-r--r-- | 55.0 KB |
shm.c | -rw-r--r-- | 32.1 KB |
syscall.c | -rw-r--r-- | 2.3 KB |
util.c | -rw-r--r-- | 22.2 KB |
util.h | -rw-r--r-- | 6.4 KB |
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